Peripheral,BaseAddr,Register,Offset,Field,BitOffset,BitWidth
DMA1,0x40026400,STS,0x0,GF1,0,1
DMA1,0x40026400,STS,0x0,FDTF1,1,1
DMA1,0x40026400,STS,0x0,HDTF1,2,1
DMA1,0x40026400,STS,0x0,DTERRF1,3,1
DMA1,0x40026400,STS,0x0,GF2,4,1
DMA1,0x40026400,STS,0x0,FDTF2,5,1
DMA1,0x40026400,STS,0x0,HDTF2,6,1
DMA1,0x40026400,STS,0x0,DTERRF2,7,1
DMA1,0x40026400,STS,0x0,GF3,8,1
DMA1,0x40026400,STS,0x0,FDTF3,9,1
DMA1,0x40026400,STS,0x0,HDTF3,10,1
DMA1,0x40026400,STS,0x0,DTERRF3,11,1
DMA1,0x40026400,STS,0x0,GF4,12,1
DMA1,0x40026400,STS,0x0,FDTF4,13,1
DMA1,0x40026400,STS,0x0,HDTF4,14,1
DMA1,0x40026400,STS,0x0,DTERRF4,15,1
DMA1,0x40026400,STS,0x0,GF5,16,1
DMA1,0x40026400,STS,0x0,FDTF5,17,1
DMA1,0x40026400,STS,0x0,HDTF5,18,1
DMA1,0x40026400,STS,0x0,DTERRF5,19,1
DMA1,0x40026400,STS,0x0,GF6,20,1
DMA1,0x40026400,STS,0x0,FDTF6,21,1
DMA1,0x40026400,STS,0x0,HDTF6,22,1
DMA1,0x40026400,STS,0x0,DTERRF6,23,1
DMA1,0x40026400,STS,0x0,GF7,24,1
DMA1,0x40026400,STS,0x0,FDTF7,25,1
DMA1,0x40026400,STS,0x0,HDTF7,26,1
DMA1,0x40026400,STS,0x0,DTERRF7,27,1
DMA1,0x40026400,CLR,0x4,GFC1,0,1
DMA1,0x40026400,CLR,0x4,GFC2,4,1
DMA1,0x40026400,CLR,0x4,GFC3,8,1
DMA1,0x40026400,CLR,0x4,GFC4,12,1
DMA1,0x40026400,CLR,0x4,GFC5,16,1
DMA1,0x40026400,CLR,0x4,GFC6,20,1
DMA1,0x40026400,CLR,0x4,GFC7,24,1
DMA1,0x40026400,CLR,0x4,FDTFC1,1,1
DMA1,0x40026400,CLR,0x4,FDTFC2,5,1
DMA1,0x40026400,CLR,0x4,FDTFC3,9,1
DMA1,0x40026400,CLR,0x4,FDTFC4,13,1
DMA1,0x40026400,CLR,0x4,FDTFC5,17,1
DMA1,0x40026400,CLR,0x4,FDTFC6,21,1
DMA1,0x40026400,CLR,0x4,FDTFC7,25,1
DMA1,0x40026400,CLR,0x4,HDTFC1,2,1
DMA1,0x40026400,CLR,0x4,HDTFC2,6,1
DMA1,0x40026400,CLR,0x4,HDTFC3,10,1
DMA1,0x40026400,CLR,0x4,HDTFC4,14,1
DMA1,0x40026400,CLR,0x4,HDTFC5,18,1
DMA1,0x40026400,CLR,0x4,HDTFC6,22,1
DMA1,0x40026400,CLR,0x4,HDTFC7,26,1
DMA1,0x40026400,CLR,0x4,DTERRFC1,3,1
DMA1,0x40026400,CLR,0x4,DTERRFC2,7,1
DMA1,0x40026400,CLR,0x4,DTERRFC3,11,1
DMA1,0x40026400,CLR,0x4,DTERRFC4,15,1
DMA1,0x40026400,CLR,0x4,DTERRFC5,19,1
DMA1,0x40026400,CLR,0x4,DTERRFC6,23,1
DMA1,0x40026400,CLR,0x4,DTERRFC7,27,1
DMA1,0x40026400,C1CTRL,0x8,CHEN,0,1
DMA1,0x40026400,C1CTRL,0x8,FDTIEN,1,1
DMA1,0x40026400,C1CTRL,0x8,HDTIEN,2,1
DMA1,0x40026400,C1CTRL,0x8,DTERRIEN,3,1
DMA1,0x40026400,C1CTRL,0x8,DTD,4,1
DMA1,0x40026400,C1CTRL,0x8,LM,5,1
DMA1,0x40026400,C1CTRL,0x8,PINCM,6,1
DMA1,0x40026400,C1CTRL,0x8,MINCM,7,1
DMA1,0x40026400,C1CTRL,0x8,PWIDTH,8,2
DMA1,0x40026400,C1CTRL,0x8,MWIDTH,10,2
DMA1,0x40026400,C1CTRL,0x8,CHPL,12,2
DMA1,0x40026400,C1CTRL,0x8,M2M,14,1
DMA1,0x40026400,C1DTCNT,0xC,CNT,0,16
DMA1,0x40026400,C1PADDR,0x10,PADDR,0,32
DMA1,0x40026400,C1MADDR,0x14,MADDR,0,32
DMA1,0x40026400,C2CTRL,0x1C,CHEN,0,1
DMA1,0x40026400,C2CTRL,0x1C,FDTIEN,1,1
DMA1,0x40026400,C2CTRL,0x1C,HDTIEN,2,1
DMA1,0x40026400,C2CTRL,0x1C,DTERRIEN,3,1
DMA1,0x40026400,C2CTRL,0x1C,DTD,4,1
DMA1,0x40026400,C2CTRL,0x1C,LM,5,1
DMA1,0x40026400,C2CTRL,0x1C,PINCM,6,1
DMA1,0x40026400,C2CTRL,0x1C,MINCM,7,1
DMA1,0x40026400,C2CTRL,0x1C,PWIDTH,8,2
DMA1,0x40026400,C2CTRL,0x1C,MWIDTH,10,2
DMA1,0x40026400,C2CTRL,0x1C,CHPL,12,2
DMA1,0x40026400,C2CTRL,0x1C,M2M,14,1
DMA1,0x40026400,C2DTCNT,0x20,CNT,0,16
DMA1,0x40026400,C2PADDR,0x24,PADDR,0,32
DMA1,0x40026400,C2MADDR,0x28,MADDR,0,32
DMA1,0x40026400,C3CTRL,0x30,CHEN,0,1
DMA1,0x40026400,C3CTRL,0x30,FDTIEN,1,1
DMA1,0x40026400,C3CTRL,0x30,HDTIEN,2,1
DMA1,0x40026400,C3CTRL,0x30,DTERRIEN,3,1
DMA1,0x40026400,C3CTRL,0x30,DTD,4,1
DMA1,0x40026400,C3CTRL,0x30,LM,5,1
DMA1,0x40026400,C3CTRL,0x30,PINCM,6,1
DMA1,0x40026400,C3CTRL,0x30,MINCM,7,1
DMA1,0x40026400,C3CTRL,0x30,PWIDTH,8,2
DMA1,0x40026400,C3CTRL,0x30,MWIDTH,10,2
DMA1,0x40026400,C3CTRL,0x30,CHPL,12,2
DMA1,0x40026400,C3CTRL,0x30,M2M,14,1
DMA1,0x40026400,C3DTCNT,0x34,CNT,0,16
DMA1,0x40026400,C3PADDR,0x38,PADDR,0,32
DMA1,0x40026400,C3MADDR,0x3C,MADDR,0,32
DMA1,0x40026400,C4CTRL,0x44,CHEN,0,1
DMA1,0x40026400,C4CTRL,0x44,FDTIEN,1,1
DMA1,0x40026400,C4CTRL,0x44,HDTIEN,2,1
DMA1,0x40026400,C4CTRL,0x44,DTERRIEN,3,1
DMA1,0x40026400,C4CTRL,0x44,DTD,4,1
DMA1,0x40026400,C4CTRL,0x44,LM,5,1
DMA1,0x40026400,C4CTRL,0x44,PINCM,6,1
DMA1,0x40026400,C4CTRL,0x44,MINCM,7,1
DMA1,0x40026400,C4CTRL,0x44,PWIDTH,8,2
DMA1,0x40026400,C4CTRL,0x44,MWIDTH,10,2
DMA1,0x40026400,C4CTRL,0x44,CHPL,12,2
DMA1,0x40026400,C4CTRL,0x44,M2M,14,1
DMA1,0x40026400,C4DTCNT,0x48,CNT,0,16
DMA1,0x40026400,C4PADDR,0x4C,PADDR,0,32
DMA1,0x40026400,C4MADDR,0x50,MADDR,0,32
DMA1,0x40026400,C5CTRL,0x58,CHEN,0,1
DMA1,0x40026400,C5CTRL,0x58,FDTIEN,1,1
DMA1,0x40026400,C5CTRL,0x58,HDTIEN,2,1
DMA1,0x40026400,C5CTRL,0x58,DTERRIEN,3,1
DMA1,0x40026400,C5CTRL,0x58,DTD,4,1
DMA1,0x40026400,C5CTRL,0x58,LM,5,1
DMA1,0x40026400,C5CTRL,0x58,PINCM,6,1
DMA1,0x40026400,C5CTRL,0x58,MINCM,7,1
DMA1,0x40026400,C5CTRL,0x58,PWIDTH,8,2
DMA1,0x40026400,C5CTRL,0x58,MWIDTH,10,2
DMA1,0x40026400,C5CTRL,0x58,CHPL,12,2
DMA1,0x40026400,C5CTRL,0x58,M2M,14,1
DMA1,0x40026400,C5DTCNT,0x5C,CNT,0,16
DMA1,0x40026400,C5PADDR,0x60,PADDR,0,32
DMA1,0x40026400,C5MADDR,0x64,MADDR,0,32
DMA1,0x40026400,C6CTRL,0x6C,CHEN,0,1
DMA1,0x40026400,C6CTRL,0x6C,FDTIEN,1,1
DMA1,0x40026400,C6CTRL,0x6C,HDTIEN,2,1
DMA1,0x40026400,C6CTRL,0x6C,DTERRIEN,3,1
DMA1,0x40026400,C6CTRL,0x6C,DTD,4,1
DMA1,0x40026400,C6CTRL,0x6C,LM,5,1
DMA1,0x40026400,C6CTRL,0x6C,PINCM,6,1
DMA1,0x40026400,C6CTRL,0x6C,MINCM,7,1
DMA1,0x40026400,C6CTRL,0x6C,PWIDTH,8,2
DMA1,0x40026400,C6CTRL,0x6C,MWIDTH,10,2
DMA1,0x40026400,C6CTRL,0x6C,CHPL,12,2
DMA1,0x40026400,C6CTRL,0x6C,M2M,14,1
DMA1,0x40026400,C6DTCNT,0x70,CNT,0,16
DMA1,0x40026400,C6PADDR,0x74,PADDR,0,32
DMA1,0x40026400,C6MADDR,0x78,MADDR,0,32
DMA1,0x40026400,C7CTRL,0x80,CHEN,0,1
DMA1,0x40026400,C7CTRL,0x80,FDTIEN,1,1
DMA1,0x40026400,C7CTRL,0x80,HDTIEN,2,1
DMA1,0x40026400,C7CTRL,0x80,DTERRIEN,3,1
DMA1,0x40026400,C7CTRL,0x80,DTD,4,1
DMA1,0x40026400,C7CTRL,0x80,LM,5,1
DMA1,0x40026400,C7CTRL,0x80,PINCM,6,1
DMA1,0x40026400,C7CTRL,0x80,MINCM,7,1
DMA1,0x40026400,C7CTRL,0x80,PWIDTH,8,2
DMA1,0x40026400,C7CTRL,0x80,MWIDTH,10,2
DMA1,0x40026400,C7CTRL,0x80,CHPL,12,2
DMA1,0x40026400,C7CTRL,0x80,M2M,14,1
DMA1,0x40026400,C7DTCNT,0x84,CNT,0,16
DMA1,0x40026400,C7PADDR,0x88,PADDR,0,32
DMA1,0x40026400,C7MADDR,0x8C,MADDR,0,32
DMA1,0x40026400,DMA_MUXSEL,0x100,TBL_SEL,0,1
DMA1,0x40026400,MUXC1CTRL,0x104,REQSEL,0,7
DMA1,0x40026400,MUXC1CTRL,0x104,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC1CTRL,0x104,EVTGEN,9,1
DMA1,0x40026400,MUXC1CTRL,0x104,SYNCEN,16,1
DMA1,0x40026400,MUXC1CTRL,0x104,SYNCPOL,17,2
DMA1,0x40026400,MUXC1CTRL,0x104,REQCNT,19,5
DMA1,0x40026400,MUXC1CTRL,0x104,SYNCSEL,24,5
DMA1,0x40026400,MUXC2CTRL,0x108,REQSEL,0,7
DMA1,0x40026400,MUXC2CTRL,0x108,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC2CTRL,0x108,EVTGEN,9,1
DMA1,0x40026400,MUXC2CTRL,0x108,SYNCEN,16,1
DMA1,0x40026400,MUXC2CTRL,0x108,SYNCPOL,17,2
DMA1,0x40026400,MUXC2CTRL,0x108,REQCNT,19,5
DMA1,0x40026400,MUXC2CTRL,0x108,SYNCSEL,24,5
DMA1,0x40026400,MUXC3CTRL,0x10C,REQSEL,0,7
DMA1,0x40026400,MUXC3CTRL,0x10C,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC3CTRL,0x10C,EVTGEN,9,1
DMA1,0x40026400,MUXC3CTRL,0x10C,SYNCEN,16,1
DMA1,0x40026400,MUXC3CTRL,0x10C,SYNCPOL,17,2
DMA1,0x40026400,MUXC3CTRL,0x10C,REQCNT,19,5
DMA1,0x40026400,MUXC3CTRL,0x10C,SYNCSEL,24,5
DMA1,0x40026400,MUXC4CTRL,0x110,REQSEL,0,7
DMA1,0x40026400,MUXC4CTRL,0x110,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC4CTRL,0x110,EVTGEN,9,1
DMA1,0x40026400,MUXC4CTRL,0x110,SYNCEN,16,1
DMA1,0x40026400,MUXC4CTRL,0x110,SYNCPOL,17,2
DMA1,0x40026400,MUXC4CTRL,0x110,REQCNT,19,5
DMA1,0x40026400,MUXC4CTRL,0x110,SYNCSEL,24,5
DMA1,0x40026400,MUXC5CTRL,0x114,REQSEL,0,7
DMA1,0x40026400,MUXC5CTRL,0x114,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC5CTRL,0x114,EVTGEN,9,1
DMA1,0x40026400,MUXC5CTRL,0x114,SYNCEN,16,1
DMA1,0x40026400,MUXC5CTRL,0x114,SYNCPOL,17,2
DMA1,0x40026400,MUXC5CTRL,0x114,REQCNT,19,5
DMA1,0x40026400,MUXC5CTRL,0x114,SYNCSEL,24,5
DMA1,0x40026400,MUXC6CTRL,0x118,REQSEL,0,7
DMA1,0x40026400,MUXC6CTRL,0x118,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC6CTRL,0x118,EVTGEN,9,1
DMA1,0x40026400,MUXC6CTRL,0x118,SYNCEN,16,1
DMA1,0x40026400,MUXC6CTRL,0x118,SYNCPOL,17,2
DMA1,0x40026400,MUXC6CTRL,0x118,REQCNT,19,5
DMA1,0x40026400,MUXC6CTRL,0x118,SYNCSEL,24,5
DMA1,0x40026400,MUXC7CTRL,0x11C,REQSEL,0,7
DMA1,0x40026400,MUXC7CTRL,0x11C,SYNCOVIEN,8,1
DMA1,0x40026400,MUXC7CTRL,0x11C,EVTGEN,9,1
DMA1,0x40026400,MUXC7CTRL,0x11C,SYNCEN,16,1
DMA1,0x40026400,MUXC7CTRL,0x11C,SYNCPOL,17,2
DMA1,0x40026400,MUXC7CTRL,0x11C,REQCNT,19,5
DMA1,0x40026400,MUXC7CTRL,0x11C,SYNCSEL,24,5
DMA1,0x40026400,MUXG1CTRL,0x120,SIGSEL,0,5
DMA1,0x40026400,MUXG1CTRL,0x120,TRGOVIEN,8,1
DMA1,0x40026400,MUXG1CTRL,0x120,GEN,16,1
DMA1,0x40026400,MUXG1CTRL,0x120,GPOL,17,2
DMA1,0x40026400,MUXG1CTRL,0x120,GREQCNT,19,5
DMA1,0x40026400,MUXG2CTRL,0x124,SIGSEL,0,5
DMA1,0x40026400,MUXG2CTRL,0x124,TRGOVIEN,8,1
DMA1,0x40026400,MUXG2CTRL,0x124,GEN,16,1
DMA1,0x40026400,MUXG2CTRL,0x124,GPOL,17,2
DMA1,0x40026400,MUXG2CTRL,0x124,GREQCNT,19,5
DMA1,0x40026400,MUXG3CTRL,0x128,SIGSEL,0,5
DMA1,0x40026400,MUXG3CTRL,0x128,TRGOVIEN,8,1
DMA1,0x40026400,MUXG3CTRL,0x128,GEN,16,1
DMA1,0x40026400,MUXG3CTRL,0x128,GPOL,17,2
DMA1,0x40026400,MUXG3CTRL,0x128,GREQCNT,19,5
DMA1,0x40026400,MUXG4CTRL,0x12C,SIGSEL,0,5
DMA1,0x40026400,MUXG4CTRL,0x12C,TRGOVIEN,8,1
DMA1,0x40026400,MUXG4CTRL,0x12C,GEN,16,1
DMA1,0x40026400,MUXG4CTRL,0x12C,GPOL,17,2
DMA1,0x40026400,MUXG4CTRL,0x12C,GREQCNT,19,5
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF1,0,1
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF2,1,1
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF3,2,1
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF4,3,1
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF5,4,1
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF6,5,1
DMA1,0x40026400,MUXSYNCSTS,0x130,SYNCOVF7,6,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC1,0,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC2,1,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC3,2,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC4,3,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC5,4,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC6,5,1
DMA1,0x40026400,MUXSYNCCLR,0x134,SYNCOVFC7,6,1
DMA1,0x40026400,MUXGSTS,0x138,TRGOVF1,0,1
DMA1,0x40026400,MUXGSTS,0x138,TRGOVF2,1,1
DMA1,0x40026400,MUXGSTS,0x138,TRGOVF3,2,1
DMA1,0x40026400,MUXGSTS,0x138,TRGOVF4,3,1
DMA1,0x40026400,MUXGCLR,0x13C,TRGOVFC1,0,1
DMA1,0x40026400,MUXGCLR,0x13C,TRGOVFC2,1,1
DMA1,0x40026400,MUXGCLR,0x13C,TRGOVFC3,2,1
DMA1,0x40026400,MUXGCLR,0x13C,TRGOVFC4,3,1